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CXA1785AR
RGB Decoder/Driver For the availability of this product, please contact the sales office.
Description The CXA1785AR is an RGB decoder/driver designed to drive LCD panels. This IC converts composite video signals, Y/C signals and Y/color difference signals into RGB signals used for driving LCDs. Features * Both NTSC/PAL compatible * Supports composite inputs, Y/C inputs and Y/color difference input * Band pass filter, trap and delay line * Sharpness function * compensation circuit * R, B output delay time adjustment circuit * Polarity reverse circuit Applications * Color liquid crystal viewfinders * Liquid crystal projectors * Industrial monitors Structure Bipolar silicon monolithic IC 48 pin LQFP (Plastic)
Absolute Maximum Ratings (Ta=25C) * Supply voltage VCC1-GND 6 V * Supply voltage VCC2-VEE 15 V * Supply voltage GND-VEE 10 V * Input pin voltage VIN VCC1 V * Operating temperature Topr -30 to +85 C * Storage temperature Tstg -55 to +150 C * Allowable power dissipation PD 560 mW Operating Conditions * Supply voltage VCC1-GND 4.25 to 5.25 V * Supply voltage VCC2-GND 4.25 to 14.0 V * Supply voltage VCC2-VEE 11.25 to 14.0 V * Supply voltage VEE-GND -8.75 to 0 V
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
--1--
E93Z28-TE
CXA1785AR
Block Diagram
SUB CONTRAST B
SUB CONTRAST R
SUB BRIGHT B
BRIGHT
DL ADJ
GAMMA 2
SUB BRIGHT R
27
GAMMA 1
SYNC IN
36 SYNC OUT 37
SYNC SEP
35
34
33
32
31
30
29
28
26
CLIP
FRP
25
VCC2
VREF
24 B OUT
SYNC SEP
38
BGP GEN
B-Y
23
DL
BRIGHT
B DC DET
INV
INT / EXT SW
EXT B IN
39
BGP G-Y
22 G OUT
BRIGHT
MATRI X
INV
EXT G IN
40
R-Y
21 G DC DET
DL
BRIGHT
EXT R IN
41
Y
INV
20 R OUT
CONTRAST
42
CLAMP
G GEN
DEMOD
N PN P
19
R DC DET
43 Vcc1
AGC AMP
PAL SW
P N
PHASE SHIFT
VEE 18
F ADJ
44
AGC DET
P N PICTURE
P
GND 17
IDENT
N
REG3 REG2
EXT SYNC
F/F
CLAMP
45
16
VXO
VXO OUT
AGC FILTER
46
REG1
COMP Y/C
HPF
COLOR
KILLER
APC HUE
15 APC FILTER
AGC OUT
47
TRAP ACC
ACC DET Y/C PAL ON
14
NT/PAL/ COLOR DEFFER
VXO IN
PICTURE
48
H. FILTER COMP
13 HUE
1
TRAP
2
H FILTER OUT
3
VIDEO IN
4
IDENT FILTER
5
C IN
6
BURST OUT
7
COLOR
8
KILLER FILTER
9
R-Y
10
11
12
B-Y
--2--
ACC FILTER
CHROMA OUT
CXA1785AR
Pin Description Pin No. 1 Symbol TRAP Pin voltage 2.0V
VCC1
(The pin voltage is VCC1 = 4.5 V) Equivalent circuit Description Trap connection. Leave this pin open other than when composite video input is selected.
1
VEE
GND
2
H FILTER OUT
VCC1
Outputs the video signal to be input to the sync separation circuit.
2
VEE
GND
3
VIDEO IN
2.25V
VCC1
3
Composite video signal input (Y signal when using Y/C input and Y/color difference input). The standard input level is 0.5 VP-P (from sync tip to 100 % white).
GND
VEE
4
IDENT FILTER
VCC1
IDENT detection filter connection. Leave this pin open other than when PAL mode is selected.
4
VEE GND
5
C IN
2.5V
VCC1
5
VEE
GND
Chroma signal input when using Y/C input. Composite video signal input is supported when this pin is connected to GND. Leave this pin open when Y/color difference input. The standard input level is 0.15 VP-P (burst).
--3--
CXA1785AR
Pin No. 6
Symbol COLOR
Pin voltage
VCC1
Equivalent circuit
Description Color adjustment. The amplitude of color difference signal is adjusted when Y/color difference input.
6
VEE GND
7
BURST OUT
3.2V
VCC1
7
Burst cleaning coil is connected for PAL. Leave this pin open other than when PAL mode is selected.
VEE GND
8
KILLER FILTER
VCC1
8
Killer detection filter is connected. Leave this pin open other than when Y/color difference input is selected.
GND VEE
9
R-Y
1.9V
VCC1
9
10
B-Y
1.9V
10
VEE GND
Color difference demodulation circuit inputs. Leave this pin open for NTSC. Color difference signal is input when Y/color difference input. In this case, input is pedestal clamped by using external coupling capacitor. ACC detection filter is connected. Leave this pin open for Y/color difference input.
11
ACC FILTER
VCC1
11 VEE
--4--
CXA1785AR
Pin No. 12
Symbol CHROMA OUT
Pin voltage 2.3V
VCC1
Equivalent circuit
Description Color adjusted and burst taken out chroma signal is output.
12
VEE
GND
13
HUE
VCC1
13
VEE GND
14
VXO IN
3.9V
VCC1
Color phase adjustment pin. Also doubles as the NTSC, PAL or Y/color difference switch. PAL is selected when this pin is connected to GND; Y/color difference is selected when this pin is connected to Vcc1. VXO input. Leave this pin open for Y/color difference input.
14 GND VEE
15
APC FILTER
VCC1
APC detection filter connection. Leave this pin open for Y/color difference input.
15
VEE GND
16
VXO OUT
2.7V
VCC1
VXO output. Leave this pin open for Y/color difference input.
16
VEE
GND
17 18
GND VEE
Ground. Minimum electric potential connection.
--5--
CXA1785AR
Pin No. 19 21 23
Symbol R DC DET G DC DET B DC DET
Pin voltage
VCC1
Equivalent circuit
Description Smoothing capacitor connection for the feedback circuit of RGB output DC level control . Use a low-leakage capacitor because this pin has high impedance.
GND
19 21 23 VEE
20 22 24
R OUT G OUT B OUT
Vcc2+VEE 2
VCC2
RGB primary color signal output.
20 22 24
VEE
25 26
VCC2 CLIP 2.3V
VCC1
Power supply connection for RGB output. Sets the RGB output amplitude (black-black) clip level. This pin is preset internally.
26
GND
27
SUB BRIGHT R SUB BRIGHT B FRP
2.2V
VCC1
27
Fine adjustment for R and B signal brightness. Functions with the compensation curve. This pin is preset internally.
28
2.2V
28
VEE
GND
29
VCC1
Polarity reverse timing pulse input for RGB output. Reversed when low; nonreversed when high.
29
VEE
GND
--6--
CXA1785AR
Pin No. 30
Symbol GAMMA1
Pin voltage
VCC1
Equivalent circuit
Description Adjusts voltage gain change point 1.
Output
30 1
VEE
GND Input
31
GAMMA2
2.25V
VCC1
Adjusts voltage gain change point 2 and the peak limiter that operates by Vw 2 above 2.This pin is preset internally.
Output Peak limiter Vw 2 2
31
VEE GND
Input
32
BRIGHT
VCC1
32
RGB output brightness adjustment. Does not function with the gamma compensation curve.
VEE
GND
33
DL ADJ
1.2V
VCC1
33
VEE GND
34
35
SUB CONTRAST R SUB CONTRAST B
2.25V
VCC1
Adjusts delay time of R and B output for G output. The delay time is adjusted by changing the resistance value between this pin and GND. The B output delay time is twice the R output delay time. Connecting this pin to VCC turns off the R output and B output delay circuits. Fine adjustment for R and B signal contrast. This pin is preset internally.
2.25V
34 35 VEE GND
--7--
CXA1785AR
Pin No. 36
Symbol SYNC IN
Pin voltage
VCC1
Equivalent circuit
Description High level input when synchronized; low level at all other times. The rising edge of the input pulse must precede the falling edge of the SYNC OUT pulse. For PAL, the internal flip flop switches at the rising edge of the input pulse. Outputs the sync signal separated by the sync separation circuit. High level when synchronized and at low level in all other cases. This pin is of an open collector output. The high level for the output should be VEE + 15 V or less. Sync separation circuit input. Input the H FILTER output signal.
36
VEE
GND
37
SYNC OUT
Vcc1
37
VEE
GND
38
SYNC SEP
1.8V
VCC1
38 VEE GND
39
EXT B IN
VCC1
40
EXT G IN
39 40
41
EXT R IN
41 VEE GND
42
CONTRAST
VCC1
External digital signal input. There are two threshold values: VTH1 (approximately 1.2 V) and VTH2 (approximately 2.2 V). When one of the RGB signals exceeds VTH1, all of the RGB outputs go to black level; when an input exceeds VTH2, only the corresponding output goes to white level. Adjusts RGB output contrast.
42
VEE GND
--8--
CXA1785AR
Pin No. 43 44
Symbol VCC1 F ADJ
Pin voltage 1.2V
VCC1
Equivalent circuit
44 VEE GND
45
CLAMP
VCC1
45
Description Power supply connection. Connect a resistance between this pin and GND; the outflow current value adjusts the internal filters. Connect 18 k for both NTSC and PAL. The following conditions apply to the resistance connected: Allowable difference in resistance: 2 % Temperature characteristics: 200 ppm Clamps the luminance signal pedestal level. Use a low-leakage capacitor because this pin has high impedance.
VEE
GND
46
AGC FILTER
VCC1
Connects AGC detection filter of luminance signal.
46
VEE
GND
47
AGC OUT
VCC1
47
Outputs the voltage detected by the AGC detection circuit of luminance signal. When the AGC amplifier gain is high, the output voltage is high.
GND
VEE
48
PICTURE
VCC1
48
Adjusts frequency response of luminance signal. Decreasing the voltage emphasizes contours.
VEE GND
--9--
CXA1785AR
Electrical Characteristics AC Characteristics Unless otherwise specified, VCC1 = 4.5 V, VCC2 = 12 V, VEE = GND, Ta = 25C, SW5a, SW8a, SW9b, SW10b, SW12Aa, SW12BON, SW13b, SW20OFF, SW22OFF, SW24OFF SW26OFF, SW27OFF, SW28OFF, SW31OFF, SW33b, SW34OFF, SW35OFF, SW38a, SW46OFF. V5 = 0 V, V6 = 2.6 V, V13 = 2.7 V, V30 = 3.5 V, V32 = 2.1 V, V42 = 2.25 V, V46 = 1.5 V, V48 = 2.5 V, and VR1=6.8 k (C): input SG11, (D): input SG7b (4.5 VP-P) Note) Adjust the burst cleaning coil so that the amplitude of the color difference signal is the same at each 1H of TP20 when SG5 (4.43 MHz, burst/chroma phase = 135) is input to (B) with a standard sample. Item Video Block Video maximum gain Symbol Gmax Conditions V42 = 1.2 V, input SG8 (-15 dB) to (A). Measure the ratio between the output amplitude (white-black) and input amplitude at TP22. Input SG8 (-14 dB) to (A). V1, V0, and V2 are the output amplitude (white-black) at TP22 when V42 is changed to 1.2 V, 2.25 V and 3.3 V. Gct1 = 20log (V1/V0) Gct2 = 20log (V2/V0) Input SG1 (0 dB) to (A) and adjust V42 so that TP22 output amplitude (white-black) is 4 V when APL = 50 % Va1 and Va2 are the amplitude at TP22 when APL = 10 % and 90 %. Input SG1 (0 dB) to (A). Vad1, Vad2, and Vad3 are the voltage at TP47 when APL = 10 %, 50 %, and 90 %. SW5b, SW46ON Input SG2 (100 kHz) to (A) and adjust V42 so that the amplitude of the sine wave at TP22 is 0.5 VP-P. Gp1 and Gp2 are the amount of change in the output amplitude at TP22 when SG2 is 2.1 MHz and V48 = 2 V and 3 V. SW5b, SW13a, SW46ON Input SG2 (100 kHz) to (A) and adjust V42 so that the amplitude of the sine wave at TP22 is 0.5 VP-P. Gp3 and Gp4 are the amount of change in the output amplitude at TP22 when SG2 is 2.4 MHz and V48 = 2 V and 3 V. Min. 33 Typ. 36 Max. 39 Unit
Amount of contrast adjustment gain variation (1) Amount of contrast adjustment gain variation (2) AGC amplitude characteristics
Gct1
3.0
5.5
dB
Gct2
- 15
- 11
Va1 Va2
4.6 2.0
5.6 2.5
6.6 3.0 VP-P
AGC detection output
Amount of image quality adjustment variation (composite video input, NTSC)
Vad1 Vad2 Vad3 Gp1 Gp2
2.7 1.1 0.1 6.0
3.0 1.7 0.5 9.0 - 4.0
3.4 2.3 0.9
V
- 1.0
Amount of image quality adjustment variation (composite video input, PAL)
Gp3 Gp4
6.0
9.0 - 4.0 - 1.0
dB
--10--
CXA1785AR
Item Amount of image quality adjustment variation (Y/C input, Y/color difference input)
Symbol Gp5 Gp6
Conditions
Min.
Typ. 17.0 1.0
Max.
Unit
Trap attenuation (NTSC) Trap attenuation (PAL)
Gtf (NT) Gtf (PAL)
DC regeneration ratio
K
SW5a, SW46ON 14.0 Input SG2 (100 kHz) to (A) and adjust V42 so that the amplitude of the sine wave at TP22 is 0.5 VP-P. With SG2 at 1.8 MHz, Gp5 and Gp6 are the amount of change in the output amplitude at TP22 when V48 = 2 V and 3 V. Input SG3 (100 kHz/3.58 MHz, 0 dB) to (A) and measure the output level at TP1 for 3.58 MHz to 100 kHz. SW13a Input SG3 (100 kHz/4.43 MHz, 0 dB) to (A) and measure the output level at TP1 for 4.43 MHz to 100 kHz. Input SG1 (APL = 10%, 0 dB) to (A). V1 is 95 the output amplitude (black-black) at TP22. Next, input SG1 (APL = 90%, 0 dB). V2 is the output amplitude (black-black) at TP22. K = (V1- |V1 - V2|) x 100/V1
3.0
dB - 45 - 30
- 45
- 30
%
Chroma Block Maximum chroma output(composite video input PAL) Maximum chroma output (Y/C input PAL)
ACC characteristics (composite video input NTSC)
ACC characteristics (Y/C input NTSC)
Vcmax1 SW5b, SW13a, V6=3.5 V 0.7 Input SG5 (4.43 MHz, burst/chroma phase = 135) to (A) and measure the amplitude of the chroma signal at TP12. Vcmax2 SW13a, V6=3.5 V 0.7 Input SG5 (4.43 MHz, burst/chroma phase = 135) to (B) and measure the amplitude of the chroma signal at TP12. GA1 SW5b Input SG5 (0 dB, +6 dB, -25 dB), (burst/ GA2 chroma phase = 180) to (A). Measure the - 10.0 output amplitude at TP12, labeling the output corresponding to 0 dB, +6 dB and -25 dB as V0, V1 and V2, respectively. GA1 = 20log(V1/V0) GA2 = 20log(V2/V0) GA3 SW5a Input SG5 (0 dB, +6 dB, -25 dB), (burst/ GA4 chroma phase = 180) to (B). Measure the - 9.0 output amplitude at TP12, labeling the output corresponding to 0 dB, +6 dB and -25 dB as V0, V1 and V2, respectively. GA3 = 20log(V1/V0) GA4 = 20log(V2/V0)
0.85
1.2
0.85
1.2
VP-P
0 - 5.0
2.0
dB 0 - 4.0 2.0
--11--
CXA1785AR
Item ACC characteristics (composite video input PAL)
Symbol GA5 GA6
Conditions SW5b, SW13a Input SG5 (0 dB, +6 dB, -25 dB), (burst/ chroma phase = 135) to (A). Measure the output amplitude at TP12, labeling the output corresponding to 0 dB, +6 dB and -25 dB as V0, V1 and V2, respectively. GA5 = 20log(V1/V0) GA6 = 20log(V2/V0) SW13a Input SG5 (0 dB, +6 dB, -25 dB), (burst/ chroma phase = 135) to (B). Measure the output amplitude at TP12, labeling the output corresponding to 0 dB, +6 dB and -25 dB as V0, V1 and V2, respectively. GA7 = 20log(V1/V0) GA8 = 20log(V2/V0) Input SG5 (0 dB, burst/chroma phase = 180) to (B). Measure the chroma signal amplitude at TP12 when V6 = 1.6 V, 2.6 V and 3.5 V, labeling the corresponding output as V0, V1 and V2, respectively. GC1 = 20log(V1/V0) GC2 = 20log(V2/V0) SW5b Input SG6 (4.43 MHz, 2.5 MHz, 3.58 MHz) to (A), labeling the output amplitude at TP12 corresponding to each frequency as V0, V1 and V2, respectively. GHP1 = 20log(V1/V0) GHP2 = 20log(V2/V0) SW5a Input SG6 (4.43 MHz, 2.5 MHz, 3.58 MHz) to (B), labeling the output amplitude at TP12 corresponding to each frequency as V0, V1 and V2, respectively. GHP3 = 20log(V1/V0) GHP4 = 20log(V2/V0) Input SG5 (0 dB) to (B). Measure the difference between 3.579545 MHz and the input frequency at which the voltage at TP8 is 2 V or less by changing the burst frequency. SW13a Input SG5 (0 dB) to (B). Measure the difference between 4.433619 MHz and the input frequency at which the voltage at TP8 is 2 V or less by changing the burst frequency.
Min.
Typ. 0
Max. 2.0
Unit
- 10.0 - 5.0
ACC characteristics (Y/C input PAL)
GA7 GA8
0 - 9.0 - 4.0
2.0
Amount of color adjustment gain variation
GC1 GC2
- 30 4.0 6.0
- 20
dB
HPF characteristics (composite video input)
GHP1 GHP2
- 30 - 6.0 - 2.0
- 10 1.0
HPF characteristics (Y/C input)
GHP3 GHP4
- 30 - 6.0 - 2.0
- 10 1.0
APC pull-in range (NTSC)
fA1
500 +2000 -1000
APC pull-in range (PAL)
fA2
500 1200
Hz
--12--
CXA1785AR
Item Killer operation input level (NTSC)
Symbol VbK1
Conditions Input SG5 (burst/chroma phase = 180) to (B) and monitor the output at TP12. Gradually reduce the input amplitude and measure the input level at which the killer operation is activated. SW13a Input SG5 (burst/chroma phase = 135) to (B) and monitor the output at TP12. Gradually reduce the input amplitude and measure the input level at which the killer operation is activated. SW8b, V42=2.6V Input SG5 (burst/chroma phase = 180) to (B). Measure the amplitude of the color difference output at TP24. SW8b, SW13a, SW12Ab, V42=2.6V Input SG5 (burst/chroma phase = 135) to (B). Measure the amplitude of the color difference output at TP24. Input SG5 (0 dB) to (B) and change the chroma phase. VR: Maximum output amplitude at TP20 VG: Maximum output amplitude at TP22 VB: Maximum output amplitude at TP24 (R-Y)/(B-Y) = VR/VB (G-Y)/(B-Y) = VG/VB SW12Ab, SW13a, V6 = 2 V Input SG5 (0 dB) to (B) and change the chroma phase. VR: Maximum output amplitude at TP20 VG: Maximum output amplitude at TP22 VB: Maximum output amplitude at TP24 (R-Y)/(B-Y) = VR/VB (G-Y)/(B-Y) = VG/VB Input SG5 (0 dB) to (B) and change the chroma phase. R: Phase in which output amplitude at TP20 reaches a maximum G: Phase in which output amplitude at TP22 reaches a maximum B: Phase in which output amplitude at TP24 reaches a maximum RB = R - B GB = G - B
Min.
Typ. - 42
Max. - 37
Unit
Killer operation input level (PAL)
VbK2
- 37
- 32
dB
Killer color residue (NTSC)
VbS1
50
100
Killer color residue (PAL)
VbS2
90
180
mVP-P
Demodulation output amplitude ratio (NTSC)
R-Y/ B-Y G-Y/ B-Y
0.56 0.29
0.66 0.36
0.76 0.44
Demodulation output amplitude ratio (PAL)
R-Y/ B-Y G-Y/ B-Y
0.60 0.30
0.70 0.38
0.84 0.46
Demodulation relative phase (NTSC)
RB GB
80 230
90 240
100 250 deg
--13--
CXA1785AR
Item Demodulation relative phase (PAL)
Symbol RB GB
Conditions SW12Ab, SW13a Input SG5 (0 dB) to (B) and change the chroma phase. R: Phase in which output amplitude at TP20 reaches a maximum G: Phase in which output amplitude at TP22 reaches a maximum B: Phase in which output amplitude at TP24 reaches a maximum RB = R - B GB = G - B (C) = OPEN Input SG5 (0 dB) to (B). With V42 = 3.0 V, adjust the chroma phase so that the amplitude at TP24 is at a maximum. Using a spectrum analyzer, measure the 7.15909 MHz component versus the 15.734 kHz component of the output at TP24. SW12A = b, SW13a, (C) = OPEN Input SG5 (0 dB) to (B). With V42 = 3.0 V, adjust the chroma phase so that the amplitude at TP24 is at a maximum. Using a spectrum analyzer, measure the 8.867238 MHz component versus the 15.625 kHz component of the output at TP24. Input SG5 (0 dB) to (B). Label the phase at which the output amplitude at TP24 reaches a maximum when V13 = 1.8 V as 1, when V13 = 2.7 V as 2, and when V13 = 3.6 V as 3. + = 1 - 2, - = 3 - 2 SW5b Input SG5 (0 dB) to (A) and gradually increase the voltage V5. Measure the voltage at which the output at TP12 disappeares. SW5b Input SG5 (0 dB) to (A) and gradually lower the voltage V5. Measure the voltage at which the output at TP12 appeares. Input SG5 (0 dB, 3.579545 MHz, burst/ chroma phase = 180) to (B) and gradually lower the voltage V13. Measure the voltage of V13 at which the output at TP24 ceases.
Min. 80 230
Typ. 90 240
Max. 100 254
Unit
deg
Demodulation output residual carrier (NTSC)
VCAR (N)
- 40
- 30
Demodulation output residual carrier (PAL)
VCAR (P)
- 50
- 40
dB
HUE variable range
+ -
30 - 30
40 - 40
deg
CompositeYC input switching voltage
VthCY
1.2
1.4
1.6
YCComposite input switching voltage
VthYC
0.7
0.9
1.1 V
NTSCPAL switching voltage
VthNP
0.4
0.7
1.0
--14--
CXA1785AR
Item Color difference input output maximum gain
Symbol Gmax (CD)
Conditions
Min. 44
Typ. 47
Max. 50
Unit
Color difference input output gain variation
NTSCY/color difference switching voltage
SW13c, SW9a, SW10a, V6=3.5V ,V42=1.2V, (A)(B) no input. Input SG12 (40 mV amplitude) to (I) and (J). Measure the amplitude at TP20 and TP24. G(CD) SW13c, SW9a, SW10a, (A)(B) no input. Input SG12 (40 mV amplitude) to (I) and (J). Measure the output amplitude variation at TP20 and TP24 during V6 = 1.6 V versus V6 = 3.5 V. VthNCD SW13b, SW9a, SW10a, V6 = 2.6 V, (A)(B) no input. Input SG12 (0.1 V amplitude) to (I) and (J) and gradually increase the voltage V13. Measure the voltage V13 at which the output at TP20 and TP24 starts. Iis Using the current from (E), measure the input current at which the signal at TP37 changes from low to high. Measure the output voltage at TP37. Increase the amplitude at SG7b from 0 V and measure the voltage at which the clamp circuit begins to operate. Input SG7a to (A) and measure TP2. Input SG7a to (A) and measure TP2. Rising edge tpLH (HF) Falling edge tpHL (HF) SW38b Input SG7 (amplitude: 0.15 Vp-p) to (A) and measure the output at TP37. Rising edge tpLH (sy) Falling edge tpHL (sy) No input for (A) and (B). V32 = 1.8 V Measure the output (black-black) at TP20, TP22, and TP24. No input for (A) and (B). V32 = 2.8 V Measure the output (black-black) at TP20, TP22, and TP24. (When the phase is different from the case of V32 = 2.1 V, make the value negative.)
- 45
- 30
dB
3.7
4.0
4.3
V
Sync Block Sync separation input sensitivity current Sync separation output ON voltage External sync input threshold H filter output gain H filter output delay time
21 0.2 1.2 1.5
30 0.5 1.8
A
VON Veth
V
Sync separation output delay time
Ghf tpLH (HF) tpHL (HF) tpLH (sy) tpHL (sy)
8 300 300 0.8 0.3
10 500 500 1.1 0.5
14 700 700 1.8 0.9
dB
ns
s
Interface Block Amount of change in brightness
Vb1
9.0
Vb2
1.0
VP-P
--15--
CXA1785AR
Item Amount of change in sub-brightness
Symbol Vsb
Conditions
Min.
Typ. 2.5
Max.
Unit V
Amount of change in sub-contrast gain
GSC1
GSC2
RGB output DC voltage
VRGB
Difference in electric po-tential for inter-RGB output black levels
VBL
Difference in reversed/ non-reversed voltage gain
GINV
Difference in inter-RGB gain (with DL OFF)
GRBG
Difference in inter-RGB gain (with DL ON)
GRBG
FRP input threshold
VthFRP
No input for (A) and (B). V32 = 2.3 V 1.0 Measure the difference in amplitudes (blackblack) at TP20 and TP24 when SW27 and SW28 are off, and when SW27 and SW28 are on, and V27 and V28 are at 1.0 V and 3.0 V. Input SG8 (-14 dB) to (A). Measure the difference in output amplitudes (white-black) at TP20 and TP24 when SW34 and SW35 are off, and when SW34 and SW35 are on, 2.5 and V34 and V35 are at 1.0 V and 3.0 V. Define them as GSC1 and GSC2, respectively. No input for (A) and (B). Adjust V32 and 5.8 measure the DC voltage at TP20, TP22, and TP24 with the amplitude (black-black) at TP22 is 0 V and 9 VP-P. No input for (A) and (B). Measure the difference between the maximum and minimum black levels when TP20, TP22, and TP24 are reversed and not reversed, respectively. Input SG8 (-11 dB) to (A). Measure the difference between the nonreversed output amplitude (white-black) and the reversed output amplitude at TP20, TP22 and TP24. Input SG8 (-11 dB) to (A). Measure the level difference of the maximum and minimum in non-reversed output amplitude (white-black) at TP20, TP22 and TP24. SW33a Input SG8 (-11 dB) to (A). Measure the level difference of the maximum and minimum in non-reversed output amplitude (white-black) at TP20, TP22 and TP24. Input SG8 (-11 dB) to (A). 1.2 While increasing the voltage at (C), measure the voltage at which the output reverses at TP20, TP22, and TP24.
- 5.0
- 4.0
dB
3.5
6.0
6.2
V
300
mV
0.3
0.6
0.3
0.6 dB
0.4
0.7
1.5
1.8
V
--16--
CXA1785AR
Item External digital RGB input threshold
Symbol
Conditions
Min. 1.0 2.0
Typ. 1.2 2.2
Max. 1.4 2.4
Unit
VthEXT1 Input SG8 (-11 dB) to (A). Input SG10 to (F), (G), and (H) and increase VthEXT2 the amplitude starting from 0 V; VthEXT1 is the voltage at which the output goes to black level for the input at TP20, TP22, and TP24 Increase the voltage further; VthEXT2 is the voltage at which the output for that input goes to white level. compensation characG 1 SW31ON, SW46ON, V30 = 2.1 V, V31 teristics = 2.1 V, V42 = 1.2 V (contrast Max.) G 2 Input SG9 to (A), and measure the gain at TP20, TP22, and TP24. VW 2
Output Vw2 A B Gg2 Gg1 Input Peak limiter
V
33 19 0.5
36 22 0.7
39 25 0.9 dB
V
Vw2 is the difference in electric potential between point B, where the compensation cuts out, and the peak limit point. Delay line R delay time tDR1 SW33a, VR1 = 9.1 k, V42 = 2.7 V. Input SG4 to (A). Measure the delay time at TP20 output to TP22 output. tDR2 SW33a, VR1 = 4.7 k, V42 = 2.7 V. Input SG4 to (A). Measure the delay time at TP20 output to TP22 output. Delay line B delay time tDB1 SW33a, VR1 = 9.1 k, V42 = 2.7 V. Input SG4 to (A). Measure the delay time at TP24 output to TP22 output. tDB2 SW33a, VR1 = 4.7 k, V42 = 2.7 V. Input SG4 to (A). Measure the delay time at TP24 output to TP22 output. Delay line RB delay t D(RAT)1 tpHL1tD (RAT)1 = tDR1 / tDB1 ratio t D(RAT) 2 tD (RAT)2 = tDR2 / tDB2 Propagation delay time tpLH1 SW5b, SW20, SW22, SW24ON between input and Input SG4 to (A). Adjust V42 and set the output (composite input) tpHL1 amplitude (white - black) at TP20, TP22, and TP24 to 4 V, and measure the rise time tpLH1 and fall time tpHL1. Propagation delay time tpLH2 SW5a, SW20, SW22, SW24ON between input and Input SG4 to (A). Adjust V42 and set the output (Y/C input) tpHL2 amplitude (white - black) at TP20, TP22, and TP24 to 4 V, and measure the rise time tpLH2 and fall time tpHL2. --17--
105
45
210
ns
90
0.4 0.4 400 400
0.5 0.5 520 520
0.6 0.6 700 700 ns
400 400
520 520
700 700
CXA1785AR
Item Propagation delay time between input and output (Y/color difference input) Propagation delay time between EXT and output
Symbol tpLH3
Conditions SW13c, SW20, SW22, SW24ON SW12BOFF Input SG4 to (A). Adjust V42 and set the amplitude (white-black) at TP20, TP22, and TP24 to 4V, and measure the rise time tpLH3 and fall time tpHL3. SW20, SW22, SW24ON Input SG10 to (F), (G), and (H). Use V30 to adjust the output amplitude at TP20, TP22, and TP24 to 4.5 V, and measure the rise time tpLH4 and fall time tpHL4. SW20, SW22, SW24ON Input SG10 to (F), (G), and (H). Use V30 to adjust the output amplitude at TP20, TP22, and TP24 to 4.5 V, and measure the rise time tTLH and fall time tTHL. SW5a, SW20, SW22, SW24ON, V42=2.6V, V48=1.7V Input SG2 (100kHz) to (A). Increase the frequency of input signal and measure the frequency at SW33 ON/OFF, respectively. The frequency must be measured at 3dB lowered in comparison with when sine wave amplitude is 100kHz. SW5a, SW20, SW22, SW24ON, V42=2.6V, V48=3.0V Input SG2 (100kHz) to (A). Increase the frequency of input signal and measure the frequency at SW33 ON/OFF, respectively. The frequency must be measured at 3dB lowered in comparison with when sine wave amplitude is 100kHz. No input for (A) and (B). V32 = 2.3 V Measure the difference in the output amplitude (black - black) at TP20, TP22, and TP24 when SW26OFF and when SW26with V26 = 3.0 V.
Min. 200
Typ. 300
Max. 400
Unit
tpHL3
200
300
400
tpLH4 tpHL4
60 140
120 200
180 260
ns
Output rise and fall times for EXT input
tTLH tTHL
20 60
50 100
100 160
Frequency response
f1DON
5.0
6.0
f1DOFF
5.0
6.0
f2DON
3.0
4.0
MHz
f2DOFF
3.0
4.0
CLIP control range
VCLIP
3.0
4.0
V
--18--
CXA1785AR
Electrical Characteristics DC Characteristics Unless otherwise specified, VCC1 = 4.5 V, VCC2 = 12 V, VEE = GND, Ta = 25C, SW5a, SW8a, SW9b, SW10b, SW12Aa, SW12BON (SW12BOFF for Y/color difference input), SW13b (SW13c for Y/color difference input), SW20OFF, SW22OFF, SW24OFF, SW26OFF, SW27OFF, SW28OFF, SW31OFF, SW33a, SW34OFF, SW35OFF, SW38a, and SW46OFF. V6 = 2.6 V, V13 = 2.7 V, V30 = 3.5 V, V32 = 2.1 V, V42 = 2.25 V, V48 = 2.5 V, and VR1 = 6.8 k (C): input SG11, (D): input SG7b (4.5 VP-P) No. Item Symbol Conditions Min. Typ. Max. Unit 27.0 35.0 24.0 32.0 3.0 1.0 12.0 3.6 2.5 21 21 53 53 53 53 53 53 100 100 100 4.0 0.3 0.2 - 1.0 - 0.2 - 1.0 - 0.2 - 6.0 - 2.0 0.2 - 1.0 - 0.2 0.2 0.2 4.3
ICC1A Measure the inflow current to Pin 43 1 Current consumption ICC1B Measure the inflow current to Pin 43 Current consumption (for Y/color 2 difference input) ICC2 Measure the inflow current to Pin 25 3 Current consumption Z1 4 TRAP output impedance Z3 VIDEO IN input impedance 5 Z5 6 C IN input impedance Z7 7 BURST OUT output impedance Z9 Hi-Z when Y/color difference input 8 R-Y input impedance Z10 Hi-Z when Y/color difference input B-Y input impedance 9 Z26 10 CLIP input impedance Z27 11 SUB BRIGHT R input impedance Z28 12 SUB BRIGHT B input impedance Z31 GAMMA2 input impedance 13 14 SUB CONTRAST R input impedance Z34 15 SUB CONTRAST B input impedance Z35 Z39 16 EXT B IN input impedance Z40 EXT G IN input impedance 17 Z41 18 EXT R IN input impedance I5 V5=GND 19 C IN pin current I6 V6=3.5V 20 COLOR pin current HUE pin current I13 V13=4.0V 21 I13 V13=GND 22 HUE pin current I29 V29=GND 23 FRP pin current I30 V30=GND 24 GAMMA1 pin current BRIGHT pin current I32 V32=2.5V 25 I36 V36=GND 26 SYNC IN pin current I42 V42=3.0V 27 CONTRAST pin current I48 V48=3.0V 28 PICTURE pin current
mA
k
6.0 1.0 1.0 A
1.0 1.0 1.0
--19--
CXA1785AR
Input Waveforms SG NO. SG1 APL variable, 5-step wave
APL10% 0.357V
Waveform
0.143V APL50%
0.179V APL90%
0.357V
SG2
The sine wave video signal is shown below. Amplitude and frequency are variable.
0.03V 0.175V 0.143V
SG3 SG4
Sine wave; amplitude 150 mVP-P, frequency variable
0.357V 10sec 1H
SG5
Chroma signal
Burst amplitude 150 mVP-P, chroma amplitude 150 mVP-P Burst, chroma frequency (3.579545 MHz, 4.433619 MHz) Chroma phase variable
0.15V
--20--
CXA1785AR
SG NO. SG6
Waveform Sine wave video signal, frequency variable.
0.15V
0.15V 1H
0.143V
SG7
Horizontal sync signal, amplitude variable.
1H a. 5s 5s b. 500ns 0V 0.143V Video input sync signal 0V External sync signal amplitude variable
SG8
5-step wave. 0 dB is shown below.
0.357V
5s
0.143V 64s
SG9
0.357V
1H
SG10
tr, tf<50ns 5s
4.5V 0V Horizontal sync signal
Synchronization with the horizontal sync signal
SG11
FRP pulse
tr, tf<50ns 63.5s 4.5V 0V 2.5s 5s Horizontal sync signal
--21--
CXA1785AR
SG NO. SG12
10s
Waveform
Amplitude variable
Horizontal sync signal Syncronization with the horizontal sync signal
Switching Characteristics Timing chart
4.5V Input waveform 50% 0V tPHL tPLH
Output waveform 50%
90%
90% 50% 10%
tTLH
tTHL
--22--
CXA1785AR
Electrical Characteristics Measurement Circuit
Vcc2 VR1 Vcc1 b a VEE
SW33
SW35 V35
SW34 V34
SW31 V31
V28
V27
SW28
(C)
SW27
SW26
(D)
V32
V30
V26
100 1
TP37 1k Vcc1 (E) b a SW38 (F) (G) (H)
36 37 38 39 40 41 42
V42
35
34
33
32
31
30
29
28
27
26
25 24 23 22
100 TP24 100 SW24 0.068 TP22 SW22 0.068 100p TP20 100 SW20 0.068 100p 100p
21 20 19 18 17 16 15
3 1
43
100 1
Vcc1 2
100
1
44
18k
1
100 Vcc1
0.47
0.0068 2.2
V46 SW46
46 47
TP47
14 13
c
48
V48
0.01
b V13
Vcc1
1
2
10
3
4
680p
5
V6
6
0.01
7
SW8
8
TP8
9
10
0.01
11
0.1
12
TP12
1
270 TP1 TP2
a SW13
56p
0.01
10M
a
b
22k
Vcc1
SW5
0.047
4
5 b
V5
a
b
6.8k
1M
SW10
0.1
(A)
(B)
(I)
(J)
1 1 k for NTSC, no resistance for PAL. 2 Allowable difference in resistance: 2 % Temperature characteristics: 200 ppm 3 KINSEKI CX-5F Frequency: 3.579545 MHz (NTSC mode) 4.433619 MHz (PAL mode) Load capacity 16 pF, frequency deviation within 30 ppm, frequency temperature characteristics within 30 ppm 4 TDK NLT 4532-S3R6B (NTSC mode) NLT 4532-S4R4 (PAL mode) 5 TOKO 332 PN-2636BS
--23--
6.8k
a SW12A
82p
a
Vcc1
b
SW12B
8.2k
5.6k
560k
45
CXA1785AR
Description of Operation * Trap The trap frequency switches between 3.58 MHz for NTSC and 4.43 MHz for PAL. When using Y/C input and Y/color difference input, the signal does not pass through the trap. * Video AGC circuit Different AGC characteristics are obtained, depending on the APL level of the luminance signal. The gain for the luminance signal is adjusted through peak detection. * ACC detection, ACC amplifier The peak amplitude of the ACC amplifier output burst signal is detected, and is used to control the ACC amplifier gain. * VXO, APC detection The VXO local oscillation circuit is a Pierce-type crystal oscillation circuit. The phases of the input burst signal and the VXO oscillator output are compared in the APC detection block, and the detective output is used to form a PLL loop that controls the VXO oscillation frequency, which means that the need for adjustments is eliminated. * External inputs Digital input with two thresholds has a pull-down resistor of 100 k. When one of the RGB inputs is higher than the lower threshold VTH1, all RGB outputs go to black level. When the higher threshold VTH2 is exceeded, the output for only the signal in question goes to white level, while the other outputs remain at black level. * compensation In order to support the characteristics of liquid crystal panels, the I/O characteristics are as shown in Fig. 1. The characteristics can be changed to those shown in Fig. 2 by adjusting Pin 30, or to those shown in Fig. 3 by adjusting Pin 31. The peak limiter function is linked to point B.
White peak limit
Output
Output B' A' B A GAMMA1 adjustment Input Fig. 2
Output B A
B'
A
B
Input Fig. 1
GAMMA2 adjustment Input Fig. 3
--24--
CXA1785AR
* RGB output The primary color signals from the RGB outputs (Pins 20, 22, and 24) are reversed by the FRP pulse input to Pin 29, as shown in Fig. 4. Feedback is applied so that the center voltage of the output signals matches the reference voltage (VCC2 + VEE)/2.
VIDEO IN
FRP
RGB OUT
Center voltage
Notes on Operation * Power supply pins Always connect the minimum electric potential applied to the IC to Pin 18; do not leave Pin 18 open. The voltages applied to the supply voltage pins must satisfy the following relationship: VEE GND VCC1 VCC2 * White balance adjustment If the SUB BRIGHT (Pins 27 and 28) and the SUB CONTRAST (Pins 34 and 35) are left at their preset states and no white balance adjustment is made in the liquid crystal display system, the white balance may be lost due to slight variations in the electronic components in this system. Therefore, it is recommended that some type of white balance adjustment always be made.
--25--
CXA1785AR
Application Circuit (NTSC)
680k
Reversed pulse input
33k 33k 39k 39k 39k 33k
4.5V 12V GND
1
33k
33k
47k
22k
22k
33k
33k
39k
33k
33k
22k
39k
39k
22k
33k
0.01
0.01
0.01
0.01
0.01
0.01
0.01
External sync input
100
33k
47k
22k
1 100
Sync separation output 37
1k
36
35
34
10k
33
32
31
30
29
28
27
26
0.01
25 24 23
100
B output
0.068 100
38
270 1
39 B G R
27k 47k 27k
22 21
100 0.068
G output
40 41 42
0.01
20
0.068
R output
19 18 17
1k 3 0.47 5.6k
43
1 18k 2
44
0.0068 100 1 2.2
45 46
16 15 14
0.01 8.2k
560k
47 48
0.01
13
1
2
10
3
4
5
6
7
8
0.047
9
10
11
12
0.01
33k
33k
39k
39k
47k
18k
0.01
Ex.) TDK NLT4532 - S3R6B TRAP
22k 39k
0.1
330k
39k
VIDEO IN
C IN
NTSC, 12 V output power supply * When using composite input: Connect C IN to GND and input the composite signal to VIDEO IN. * When using Y/C input: Input the Y signal to VIDEO IN and the C signal to C IN. In this case, the TRAP for Pin 1 is not needed.
1 Use a ceramic capacitor for the decoupling capacitor 1F for the power supply, and connect it close to the IC pin. 2 Allowable difference in resistance: 2 % Temperature characteristics: 200 ppm 3 KINSEKI CX-5F Frequency: 3.579545 MHz Load capacity 16 pF, frequency deviation within 30 ppm, frequency temperature characteristics within 30 ppm
Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same.
--26--
0.1
1M
CXA1785AR
Application Circuit (PAL)
680k
Reversed pulse input
33k
39k
39k
33k
39k
33k
4.5V
22k
33k
33k
47k
22k
33k
33k
22k
22k
12V GND
1
33k
39k
33k
22k
39k
39k
33k
0.01
33k
0.01
0.01
47k
0.01
0.01
0.01
0.01
External sync input
100
1 100
Sync separation output 36 37
1k
35
34
33
32
31
30
29
28
27
0.01
10k
26
25 24 23
100
B Output
0.068 100
38
270 1
39 B G R
27k 47k 27k
22 21
100 0.068
G Output
40 41 42
0.01
20
0.068
R Output
19 18 17 16 15 14
0.01 8.2k 3 0.47 5.6k
43
1 18k 2
44
0.0068 100 1 2.2
45 46
560k
47 48
0.01
13
1
2
10
3
4
5
10M 0.01
6
7
8
0.047
9
10
0.1
11
12
1M 6.8k
33k
33k
39k
332PN-2636BS
0.01
Ex.) TDK NLT4532 - S4R4 TRAP
680p
56p
6.8k
0.01
330k
22k 39k 0.1 39k
VIDEO IN C IN
PAL, 12 V output power supply * When using composite input: Connect C IN to GND and input the composite signal to VIDEO IN. * When using Y/C input: Input the Y signal to VIDEO IN and the C signal to C IN. In this case, the TRAP for Pin 1 is not needed.
1 Use a ceramic capacitor for the decoupling capacitor 1F for the power supply, and connect it close to the IC pin. 2 Allowable difference in resistance: 2 % Temperature characteristics: 200 ppm 3 KINSEKI CX-5F Frequency: 4.433619 MHz Load capacity 16 pF, frequency deviation within 30 ppm, frequency temperature characteristics within 30 ppm
Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same.
--27--
82p
CXA1785AR
Application Circuit (Y/color difference input)
680k
Reversed pulse input
33k 39k 33k 39k 39k 33k
4.5V 12V GND
1
33k
33k
33k
22k
22k
33k
33k
39k
33k
22k
47k
39k
39k
22k
33k
0.01
0.01
0.01
0.01
0.01
0.01
0.01
External sync input
100
33k
47k
22k
1 100
Sync separation output 36 37
1k 270 1
35
34
33
32
31
30
29
28
27
0.01
10k
26
25 24
100
B output
0.068
38 39 40 41
23
100
B G R
27k 47k 27k
22
0.068
G output
21
100
20
0.068
R output
42
0.01 1
19 18 17 16 15 14 13
43
18k 2
44
0.0068 100 1 2.2
45 46
560k
47 48
0.01
1
2
10
3
4
5
6
7
8
9
10
11
12
33k
33k
39k
0.01
22k 39k 330k 39k
Y IN
1 Use a ceramic capacitor for the decoupling capacitor 1F for the power supply, and connect it close to the IC pin. 2 Allowable difference in resistance: 2 % Temperature characteristics: 200 ppm
Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same.
--28--
0.01
R-Y IN B-Y IN
0.01
CXA1785AR
Package Outline
Unit : mm
48PIN LQFP (PLASTIC)
9.0 0.3 7.0 0.2
36
25
0.15
0.05
37
24
A 48 13
1 0.5
12 0.2 0.06 0.08 M 0.1 0.1
8.0 0.2
0.65 0.2
1.45 0.2
0 to 10
0.1
DETAIL A
PACKAGE STRUCTURE
PACKAGE MATERIAL SONY CODE EIAJ CODE JEDEC CODE LQFP-48P-L111 LQFP048-P-0707-AP LEAD TREATMENT LEAD MATERIAL PACKAGE WEIGHT EPOXY RESIN SOLDER PLATING 42 ALLOY 0.2g
--29--
0.5

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